Regviz

NXP Semiconductors /LPC1102_04 /SYSCON /WDTCLKUEN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as WDTCLKUEN

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/LPC11D14/SYSCON/WDTCLKUEN#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NO_CHANGE)ENA 0RESERVED

ENA=NO_CHANGE

Description

WDT clock source update enable

Fields

ENA

Enable WDT clock source update

0 (NO_CHANGE): No change

1 (UPDATE_CLOCK_SOURCE): Update clock source
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data